Sense amplifier is a critical component of static random access memory (SRAM). FIG. 1 is a typical configuration of sense amplifier used in SRAM. The SRAM cell in FIG. 1 is a basic element in SRAM chip for storing logic values. As shown in FIG. 1, the SRAM cell is a typical six-transistor configuration, which conducts data write and data read via two bit lines BL and BLb. The pre-charge and equalization circuit acts as assist circuit of the SRAM cell. During sensing stage, the SRAM cell outputs a pair of complementary signals on BL and BLb, that is, potential at BL is higher than BLb, or potential at BL is lower than BLb, so as to indicate whether logic value 0 or 1 is stored in the SRAM cell.
The potential difference between the complementary signals on BL and BLb is very small, generally in the range of several tens mV to one hundred mV, which is much smaller than the potential difference between logic high level and logic low level in general digital circuit. Therefore, the SRAM cell itself has limited driving capability and can not meet the requirement for driving subsequent stage logic circuits. Sense amplifier is used to process signals output on BL and BLb. The sense amplifier is generally shared by a plurality of SRAM cells whose output (that is, BL and BLb in FIG. 1) are connected to the input of the sense amplifier (that is, DLT and DLC in FIG. 1) via a bit line multiplexer circuit. The sense amplifier amplifies the two differential input signals and then outputs the two logic signals. For example, if signal level on DLT is higher than signal level on DLC, the sense amplifier will output logic high level at the output terminal OUT; and if signal level on DLT is lower than signal level on DLC, the sense amplifier will output logic low level at the output terminal OUT. A sense amplifier has stronger driving capability and thus can drive subsequent stage logic circuits.
Those skilled in the art can appreciate that, after a SRAM cell outputs signals on BL and BLb, the sense amplifier needs a certain amount of time to establish stable output. Speed of sense amplifier may be used to reflect the length of that time. The development in modern communication technology and high performance computing technology has put higher and higher requirement on speed of sense amplifier.